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Educational Processors

Many simplified processors have been designed to teach computer architecture concepts without overwhelming the students.

Here is an alphabetical list:

Beta MIT 1997 several including TTL 32 bit Alpha-like RISC 19 instructions
DLX John L. Hennessy and David A. Patterson 1990 many implementations 32 bit MIPS-like RISC 22 instructions
Elementary Microprocessor Rory O'Hare 2011 logic blocks in Logisim 16 bit IAS style 23 instructions
Hack Noam Nisan and Shimon Schocken 2005 logic gates in simulator 16 bit low level 2 microcode-like instructions
MCPU Tim Böscke 2007 VHDL or Verilog 8 bit IAS style 4 instructions
PIP-1 Forrest M. Mims III 1978 logic blocks 4 bit 8 instructions
PISC Bradford J. Rodriguez 1994 TTL 16 bit hardwired or microcode 1 microcode-like instruction
SC-16 Glen G. Langdon Jr. 1982 TTL and bit slice 16 bit PDP-8 style 18 instructions
Simon Edmund C. Berkeley 1950 relays 2 bit Harvard 9 instructions
Sweet-16 Venelin Angelov and Volker Lindenstruth 2000 library of logic blocks 16 bit RISC 33 instructions (17 are optional)
Tiny Computer 3 Chuck Thacker 2007 Verilog 32 bit RISC 7 microcode-like instructions
Tiny Computer 5 Chuck Thacker 2008 Verilog 32 bit RISC 4 microcode-like instructions
Tiny Computer 6 Chuck Thacker 2010 Verilog 32 bit RISC 16 microcode-like instructions
Yfcpu Colin MacKenzie 2010 Verilog 8 bit RISC 10 instructions

  • Hack: it is not supposed to be programmed directly, but to serve as a base on which to implement a Java-like virtual machine
  • PIP-1 is described in chapter 8 of the book "Understanding Digital Computers" which is not available online
  • PISC: one of its key chips, the 74LS172, is now practically impossible to find
  • SC-16 is described (along with TM-16) in the book "Computer Design" which is not available online

Some educational processors were not electronic at all, but just learning aids.

Cardiac David Hagelbarger and Saul Fingerman 1968 cardboard and moving strips 3 decimal digits plus sign IAS style 10 instructions
Little Man Computer Stuart Madnick 1965 ? 3 decimal digit IAS style 10 instructions
Paper Processor Saito Yutaka 2010 paper with moving strips and overlays 2 bit Harvard 3 instructions